Emulation systems may comprise hardware components, such as emulation chips and processors, capable of processor-based (e.g., hardware-based) emulation of logic systems, such as integrated circuits (ICs), application specific integrated circuits (ASICs), central processing units (CPUs), graphics processing units (GPU), field-programmable gate arrays (FPGAs), and the like. By executing various forms of programmable logic, the emulation chips may be programmed to mimic the functionality of nearly any logic system design that is undergoing testing and verification. Processor-based emulation allows logic system designers to prototype a logic system's design, before a manufacturer expends resources manufacturing a logic system product based on the design.
An emulation system may be connected to a target device, wherein the target device may aid the testing and verifying the logic being emulated in the emulation system. For example, if the emulation system is emulating a graphic processing unit (GPU), the target device may be a motherboard configured to receive the GPU once the GPU has been fabricated. For testing and verifying the logic being emulated, the target device may provide inputs to and receive outputs from the emulation system. For example, in the case of the GPU being emulated, the motherboard may include devices that receive outputs from the GPU and send inputs to the GPU.
The emulation system and the target device may be interconnected using a cable, which introduces a round trip cable delay (RTCD). RTCD, from the emulation system perspective, may be defined as the sum total of the time taken by an output data or signal down the cable to the target device added to the time taken by an input data or signal up the cable from the target device to the emulation system. In addition to the RTCD, the target device may introduce a delay for the time required to receive the output from the emulation system, process the output to generate the input to the emulation system corresponding to the output, and transmit the input signal to the emulation system. Therefore, the emulation system may see a total delay of RTCD and the delay added by the target device. To account for these delays, the cycle of the interface clock—used to control the output from and input to the emulation system—may have to be made longer. More specifically, the interface clock cycle may have to be at least as long as the RTCD added to the delay caused by the target device. A longer clock cycle may translate to a lower frequency and therefore a slower emulation system.